You could easily re-use code from MISTER or Minimig for the core functionality of the replacement chips, but you would have to write new VHDL to handle the pins and data coming in and out of the FPGA... this is not implemented in the MISTER or Minimig because they aren't actually communicating off of the FPGA (the CPU and Custom chips are all on board).
The code is not trivial, you have to understand all the timing nuances of the pins and also you will likely need external circuitry to go from a 3.3V I/O on the FPGA to 5V on the Amiga.